Tuesday , 19 June 2018
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Stanford and MIT researchers create 3D carbon nanotube CPU architecture

Researchers have developed a new CPU architecture that, they claim, could solve some of bandwidth issues challenging chip design, and possibly even help extend Moore’s Law on silicon a little further.

The prototype was built by a team of researchers from Stanford and MIT, which managed to combine memory, microprocessor and sensors onto a single discrete unit made of graphene nanotubes, with resistive RAM (RRAM) squished over the top. 

The 3D computer architecture is, the team claims, “the most complex nano-electronic system ever made with emerging nano-technologies”.

Carbon has a higher tolerance to heat than silicon, and so using the carbon nanotubes means that the chip can stand up to higher temperatures than a regular chip – especially now the wafers are getting so ridiculously thin.

The research funded by the Defense Advanced Research Projects Agency (DARPA) and the US National Sanitation Foundation (!) is making good headway, but it is, for want of a better phrase, ‘not backwards compatible’ and so it could be a while before we see anything in the shops that uses the same technology.

“The devices are better: Logic made from carbon nanotubes can be an order of magnitude more energy-efficient compared to today’s logic made from silicon, and similarly, RRAM can be denser, faster, and more energy-efficient compared to DRAM,” said Philip Wong from the MIT team.

The work has come on at a phenomenal pace, with a University of Winsconsin-Madison team first perfecting the nanotube system to overtake speeds possible in silicon chips as recently as last September.

At that time, experts estimate the chips could take a current up to 1.9 times that of a conventional silicon dewberry. Ultimately it’s thought that figure will increase to five times the speed, with a fifth of the energy, but again, no time frames.

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